![xeon quicksync xeon quicksync](https://d1grq5ng0vix8v.cloudfront.net/original/2X/7/76a4cff0f363f65c0b4eb47e384e804e8a294a3f.jpeg)
Version 5 (Skylake) The Skylake microarchitecture adds a full fixed-function H.265/HEVC main/8-bit encoding and decoding acceleration, hybrid and partial HEVC main10/10-bit decoding acceleration, JPEG encoding acceleration for resolutions up to 16,000×16,000 pixels, and partial VP9 encoding and decoding acceleration. Also, it has two independent bit stream decoder (BSD) rings to process video commands on GT3 GPUs this allows one BSD ring to process decoding and the other BSD ring to process encoding at the same time. Version 4 (Broadwell) The Broadwell microarchitecture adds VP8 hardware decoding support. This generation of Quick Sync supports the H.264/MPEG-4 AVC, VC-1 and H.262/MPEG-2 Part 2 video standards. The highest-quality TU1 setting is intended to be higher quality than Ivy Bridge's version, and the highest speed TU7 setting should be faster, higher-quality, and more battery-friendly for mobile devices. It has seven hard-coded quality/performance levels (called "target usages"), compared to the three in previous generations. Version 3 (Haswell) The Haswell microarchitecture implementation is focused on quality, with speed about the same as before (for any given clip length vs. Version 2 (Ivy Bridge) The Ivy Bridge microarchitecture included a "next-generation" implementation of Quick Sync. " Version 1 (Sandy Bridge) Quick Sync was initially built into some Sandy Bridge CPUs, but not into Sandy Bridge Pentiums or Celerons. > shortfall in H.264 transcoding performance is quite significant vs i7.There are different versions of Intel Quick Sync, and each version offers different features, so some things will depend on which Intel processor your computer uses. > The problem is Xeon is also used in workstation-class systems, and the > on Xeon which would have consumed transistor budgets and not provided any benefit for the server case. > I assume because Quick Sync somehow requires on-chip HD Graphics, this entire subsystem would have been required > in video encode/decode performance will become broader and greater.
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> If Xeon does not adopt this, by the Skylake time frame the variance > WMV9, AVC, H264, VP8 and HEVC/H265 video, and possibly VP9: Skylake_graphics_architecture > Also early Skylake info says Quick Sync will be enhanced to do more codecs: JPEG, JMPEG, MPEG2, VC1, However I'm not seeing trends in that direction. > and GPU-assisted transcoding is more flexible than Quick Sync, and will eventually be refined > A counter-argument is Xeon workstation-class systems usually have powerful discrete GPUs, > only works for MPEG-2 and single-pass H.264, these are commonly needed, so it's not a rare edge case. > Some disparage Quick Sync as a "one trick pony", but for video editors it's a very useful pony. > This has created a situation where "consumer" i7 CPUs vastly out-perform Xeon on certain video transcoding tasks. Xeon doesn't have this, not even the brand-new E5-2699 v3. > Sandy Bridge and later core CPUs have Quick Sync, which is apparently tied to on-chip Is there any plan to add Quick Sync to Xeon in the future? The problem is Xeon is also used in workstation-class systems, and the shortfall in H.264 transcoding performance is quite significant vs i7. I assume because Quick Sync somehow requires on-chip HD Graphics, this entire subsystem would have been required on Xeon which would have consumed transistor budgets and not provided any benefit for the server case. If Xeon does not adopt this, by the Skylake time frame the variance in video encode/decode performance will become broader and greater. However I'm not seeing trends in that direction.Īlso early Skylake info says Quick Sync will be enhanced to do more codecs: JPEG, JMPEG, MPEG2, VC1, WMV9, AVC, H264, VP8 and HEVC/H265 video, and possibly VP9: Skylake_graphics_architecture Even though it only works for MPEG-2 and single-pass H.264, these are commonly needed, so it's not a rare edge case.Ī counter-argument is Xeon workstation-class systems usually have powerful discrete GPUs, and GPU-assisted transcoding is more flexible than Quick Sync, and will eventually be refined to equal that performance. Some disparage Quick Sync as a "one trick pony", but for video editors it's a very useful pony. This has created a situation where "consumer" i7 CPUs vastly out-perform Xeon on certain video transcoding tasks. Sandy Bridge and later core CPUs have Quick Sync, which is apparently tied to on-chip HD Graphics.